Interested in taking a class taught by Prof. Scherer or wondering what the lab schedule is? Look here for course descriptions, syllabi, schedules and lecture notes.
6 units (2-2-2); first, second terms; six units credit for the freshman laboratory requirement
Prerequisite: successful completion of APh/EE 9a is a prerequisite for enrollment in APh/EE 9b
Introduction to solid-state electronics, including physical modeling and device fabrication
Topics: semiconductor crystal growth and device fabrication technology, carrier modeling, doping, generation and recombination, pn junction diodes, MOS capacitor and MOS transistor operation, and deviations from ideal behavior
Laboratory includes computer aided layout and fabrication and testing of light emitting diodes, transistors, and inverters. Students learn photolithography and use of vacuum systems, furnaces, and device-testing equipment
Explore the techniques and applications of nanofabrication and miniaturization of devices to the smallest scale.
Focused on the understanding of the technology of miniaturization, its history and present trends towards building devices and structures on the nanometer scale.
Examples of applications of nanotechnology in the electronics, communications, data storage and sensing world are described, and the underlying physics as well as limitations of the present technology is discussed.
Topics: Nanofabrication, Imaging and Measurement of Nanostructures, Nanophotonics and Nanoelectronics, Magnetics and Fluidics, Integrated Miniaturized Systems
Kate FiniganMC 200-36, Caltech1200 E California BlvdPasadena, CA 91125 Office: 212 Sloan AnnexPhone: 626.395.4585Fax: 626.577.8442Email: kate@caltech.edu